ANAFLASH at DAC and FMS 2026

ANAFLASH Shares Low-Power AI Computing Vision at DAC and FMS 2026

ANAFLASH Inc. recently participated in two major industry events—Design Automation Conference 2026 in Long Beach and Future of Memory and Storage 2026 in Santa Clara—where R. Scott Hills, VP of Business Development at ANAFLASH, presented the company’s vision for low-power, responsive AI computing.

At DAC 2026 (Presentation – 63dac.conference-program.com) , Scott presented “Real-Time Reflex Computing by FLASH Processing-In-Memory (PIM)” as part of the session “How Silicon Startups Are Addressing the AI Memory Gap.” His presentation highlighted ANAFLASH’s approach to Physical AI and how FLASH-based processing-in-memory can help address the growing need for real-time, energy-efficient computation at the edge.

At Future of Memory and Storage 2026 (https://www.terrapinn.com/conference/future-memory-storage/2026-Speakers.stm), Scott shared ANAFLASH’s approach to time-domain compute-in-memory IP for low-power and high-bandwidth AI computation, emphasizing how ANAFLASH’s architecture is designed to reduce data movement, improve energy efficiency, and support more responsive AI systems.

As AI continues to push the limits of memory bandwidth, power consumption, and data movement, ANAFLASH believes the relationship between memory and compute must continue to evolve. Through our FLASH Processing-in-Memory and time-domain compute-in-memory technologies, we are working to bring compute closer to memory and enable low-power, real-time AI for the edge.

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