Legato-Logic is a proprietary mixed-signal neural network processor IP to enable large AI models running from the edge device by significantly reducing the data traffic between processor and memory.

Generative AI model such as large language model (LLM) has lots of parameters. In the conventional processor architecture, the trained model is stored in NAND, copied to DRAM and then processed, once copied to SRAM in a processor, requiring large amount of data traffic between processor and memories. Moving data in this way results in a significant performance bottleneck ("memory wall problem"), consumes lots of amount of power, and requires large amount of DRAM.

Legato-Logic is a standard logic compatible time-domain compute-in-memory technology that can be integrated in any types of memory that can significantly reduce data traffic between processor and memory. Without power and area hungry ADCs and DACs, Legato-Logic operates in a near-threshold supply range while ensuring robust operation under PVT variation by proprietary time self-tracking architecture.